Description: 8阶对称系数并行FIR滤波器(verilog)用作数字滤波,系数可调。根据实际截止频率决定。-8-order FIR filter symmetric coefficients parallel (verilog) used for digital filtering, adjustable coefficient. Decisions based on the actual cut-off frequency. Platform: |
Size: 1024 |
Author:TGY |
Hits:
Description: 里面是一个FIR滤波器的VHDL语言 具体的功能里面有详细的介绍 对毕业设计者很有帮助的 -There is a FIR filter VHDL language specific features which are detailed introduction to the graduate designers helpful Platform: |
Size: 4096 |
Author:丛宇 |
Hits:
Description: fir滤波器的Verilog程序,看看吧,还不错!-fir filter Verilog procedures, take a look at it, but also good! Platform: |
Size: 4096 |
Author:wanghua |
Hits:
Description: 16阶FIR滤波器--本设计用VERILOG HDL语言串行DA算法实现16阶有限频率响应滤波器!-16-order FIR filter- this design language VERILOG HDL serial DA algorithm limited frequency response of 16-order filter! Platform: |
Size: 799744 |
Author:yuming |
Hits:
Description: fir滤波器-verilog,基于verilog的fir滤波器源码-fir filter-verilog, the fir filter based on the Verilog source code Platform: |
Size: 742400 |
Author:zhc |
Hits:
Description: 本文主要分析了FIR数字滤波器的基本结构和硬件构成特点,简要介绍了FIR滤波器实现的方式优缺点 结合Altera公司的Stratix系列产品的特点,以一个基于MAC的8阶FIR数字滤波器的设计为例,给出了使用Verilog硬件描述语言进行数字逻辑设计的过程和方法,并且在QuartusⅡ的集成开发环境下编写HDL代码,进行综合 利用QuartusⅡ内部的仿真器对设计做脉冲响应仿真和验证。-This paper analyzes the FIR digital filter structure and the basic hardware features, a brief introduction of the FIR filter the way to achieve the advantages and disadvantages of combining Altera s Stratix series of characteristics of the product, with a MAC based on the 8-order FIR digital filter design For example, given the use of Verilog hardware description language for digital logic design process and methods, and Quartus Ⅱ integrated development environment, prepared HDL code, for comprehensive utilization of Quartus Ⅱ emulator internal design so the impulse response simulation and verification. Platform: |
Size: 79872 |
Author:sundan |
Hits:
Description: 用verilog设计的FIR滤波器。滤波器需要很快的处理速度,所以采用了wallace树算法,超前进位加法器-The FIR filter is designed with verilog. To improve the process speed, wallace tree and fast-carrylook-aheadarithmetic were used. Platform: |
Size: 324608 |
Author:simeon chan |
Hits:
Description: 使用verilog语言实现的fir滤波器,使用了内部的触发器资源,优化。-Verilog language used to achieve the fir filter, the use of internal resources of the flip-flop, and optimize. Platform: |
Size: 1024 |
Author:liang jianbing |
Hits:
Description: 一个 FIR 滤波器的 verilog 实现, 与 matlab 产生的 reference code 相互验证。-Verilog a FIR filter to achieve, with the reference code generated by matlab mutual authentication. Platform: |
Size: 97280 |
Author:wei |
Hits:
Description: 利用verilog语言设计实现8路FIR滤波-Using verilog Language Design and Implementation of 8-channel FIR filter Platform: |
Size: 96256 |
Author:juan |
Hits:
Description: 做作业的时候用VERILOG编写的FIR滤波器程序,希望对大家有用-Homework time FIR filter with VERILOG written procedures, we want to be useful Platform: |
Size: 1024 |
Author:龙兰飞 |
Hits:
Description: low pass FIR filter programmed by Verilog, you can change the coefficients in the program to achieve different response Platform: |
Size: 4225024 |
Author:吴恒 |
Hits:
Description: 一种基于verilog的fir滤波源码,并带matlab仿真源程序。-Based on the fir filter verilog source code and source code with matlab simulation. Platform: |
Size: 23552 |
Author:对称 |
Hits: